D3.4 TM hardware abstraction layer
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- D3.4 TM hardware abstraction layer - This deliverable is available only to Programme Participants (FP7). Please contact the VELOX Coordinator for more information.
An Integrated Approach to Transactional Memory on Multi and Many-core Computers
News
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06/09/2010
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20/04/2010
www.eurosys2010.sigops-france.fr
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10/02/2010
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17/11/2009
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01/10/2009
www.disc-conference.org/disc2009/
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