FaulTM: Fault-Tolerance Using Hardware Transactional Memory
June, 2010
The 3nd Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures (PESPMA 2010)
An Integrated Approach to Transactional Memory on Multi and Many-core Computers
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The 3nd Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures (PESPMA 2010)