AMD releases Advanced Synchronization Facility (ASF) specification

15/06/2009

AMD has released an experimental specification for a proposed AMD64 architecture feature that may be of interest to all programmers of highly concurrent programs, libraries, runtimes, and operating systems: Advanced Synchronization Facility, or ASF. ASF is intended to make it easier to write efficient, highly concurrent programs. ASF is an experimental architecture extension currently in proposal stage.

ASF has proven to be a true cross-functional collaboration effort with team members looking at various
software applications, hardware implementation as well as the specification itself. AMD's Operating System Research Center (OSRC) colaborates within the context of the EU-funded VELOX project aiming at improving the state of the art for software-transactional-memory systems.

When AMD introduced multicore CPUs to the x86 world, they acknowledged that individual CPU cores weren't getting much faster with each silicon-technology generation. Instead, they decided to provide multiple CPU cores in one processor. This put the burden on the software community of making programs run faster on newer processors (i.e., programs have to be changed to take advantage of the parallelism.)

Writing efficient, concurrent programs or parallelizing an existing sequential program is a hard endeavor. The trickiest part is making sure that all program threads have a consistent view of all shared data. ASF is intended to address this very problem, known as synchronization.

ASF provides a mechanism to update multiple shared memory locations atomically without having to rely on locks for mutual exclusion. It's quite flexible as the semantics of the update are not fixed, but can be provided using standard x86 instructions. The ASF specification includes a new group of instructions to delimiter a speculative region, and another instructions that signify the memory locations that need to be monitored for external modifications and also read/writes the memory operands into registers. The speculative region can be commited or aborted, it means that the memory updates are accepted or discarded, respectively.

More information at the AMD coorporate blogs:

http://forums.amd.com/devblog/blogpost.cfm?threadid=114715&catid=317