VELOX presents at EUROSYS 2010

20/04/2010
www.eurosys2010.sigops-france.fr

VELOX-funded researchers from Advanced Micro Devices, Technische Universitaet Dresden and Universite den Neuchatel have published their joint work of "Evaluation of AMD's Advanced Synchronization Facility within a Complete Transactional Memory Stack" at the EUROSYS 2010 conference in Paris, France.

In the paper, the authors put together the corner stone of the VELOX transactional memory (TM) stack: a TM-aware compiler "DTMC", a TM library "TinySTM" and a CPU simulator that implements an industry-proposed TM hardware extension "ASF". The integration of these three components is unprecedented and spurs TM research, as it simplifies the adoption of TM in applications and provides realtistc performance estimates.