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VELOX TUTORIAL: The VELOX Transactional Memory System Stack from Applications to Hardware


Saturday, June 4th, 2011 1:30 - 5:00 pm San Jose, CA

Tutorial presentations are available for download here.

Early registration deadline is May 16: (registration now closed)

More information is available at: and (Tutorial 3).

TUTORIAL 3: The VELOX Transactional Memory System Stack from Applications to Hardware

Objectives and Topics Covered:

The transactional memory (TM) programming paradigm is a strong contender to become the approach of choice for replacing locks and implementing atomic operations in concurrent programming. Combining sequences of concurrent operations into atomic transactions promises a great reduction in the complexity of both programming and verification, by making parts of the code appear to be sequential without the need to program fine-grained locks. Transactions remove from the programmer the burden of figuring out the interaction among concurrent operations that happen to conflict when accessing the same locations in memory. To make TM an effective tool, TM systems will need the right hardware and software support to provide scalability not only in terms of number of cores, but also in terms of code size and complexity. The objective of the VELOX project ( is to understand how to provide such support by developing an integrated TM stack. The VELOX TM stack spans a system from the underlying hardware to the high end application and would consist of the following components: CPU, operating system, runtime, libraries, compilers, programming languages and application environments. The objective of the tutorial is to introduce Transactional Memory in general, and the VELOX transactional memory stack with all its components in particular.

Presentation philosophy and target audience:

This tutorial will introduce the different layers of the VELOX stack (C/C++ Applications, TM Compilers, Runtime and Hardware) in a hands-on session focused on application development.

The tutorial is targeted toward (i) Software and Hardware developers and researchers that are not familiar with TM and are curious to learn what TM offers, or (ii) developers and researchers that have a general understanding of TM that would like to start developing code or engage in research using TM.


A laptop with an AMD or Intel 64-bit X86 processor


Adrian (BSC), Osman (BSC), Gina (BSC), Javier (UPC), Gokcen (BSC), Stephan (AMD), Martin (AMD), Vincent (EPFL)