|
Publications
-
Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory
October, 2011
Adria Armejach, Azam Seyedi, Rubén Titos, Ibrahim Hur, Osman S. Unsal, Adrián Cristal, Mateo Valero
To appear in 20th International Conference on Parallel Architectures and Compilation Techniques (PACT'2011)
-
SymptomTM: Symptom Based Error Detection and Recovery Using Hardware Transactional Memory
October, 2011
Gulay Yalcin, Osman S. Unsal, Adrián Cristal, Ibrahim Hur, Mateo Valero
To appear in 20th International Conference on Parallel Architectures and Compilation Techniques (PACT'2011)
-
STM2: A Parallel STM for High Performance Simultaneous Multithreading Systems
October, 2011
Gokcen Kestor, Roberto Gioiosa, Tim Harris, Osman S. Unsal, Adrián Cristal, Ibrahim Hur, Mateo Valero
To appear in 20th International Conference on Parallel Architectures and Compilation Techniques (PACT'2011)
-
Atomic Boxes: Coordinated Exception Handling with Transactional Memory
July, 2011
Derin Harmanci, Vincent Gramoli and Pascal Felber. In Proceedings of the 25th Conference on Object-Oriented Programming (ECOOP) 2011. Preprint
-
Deadline-Aware Scheduling for Software Transactional Memory
June, 2011
Walther Maldonado, Patrick Marlier, Pascal Felber, Julia Lawall, Giller Muller and Etienne Rivière.
To appear in the Proceedings of the 41th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'11), June 2011.
-
Transactional Memory for Dependable Embedded Systems
June, 2011
Christof Fetzer, TU Dresden, and Pascal Felber, University of Neuchatel
7th Workshop on Hot Topics in System Dependability (HotDep'11)27 June 2011, Sheraton Hong Kong Hotel & Towers, Hong Kong, China
-
The impact of non-coherent buffers on lazy hardware transactional memory
May, 2011
Anurag Negi, Ruben Titos-Gil, Manuel E. Acacio, Jose M. Garcia, Per Stenstrom; To appear in the Proceedings of the 13th Symposium on Advances on Parallel and Distributed Processing (APDCM), May 2011.
-
Circuit Design of a Dual-Versioning L1 Data Cache for Optimistic Concurrency
May, 2011
Azam Seyedi, Adria Armejach, Adrián Cristal, Osman S. Unsal, Ibrahim Hur, Mateo Valero
, Proceedings of the 21st Great Lakes Symposium on Very Large Scale Integration (GLSVLSI'11)
(Best Paper Award
)
-
TMBox: A Flexible and Reconfigurable 16-core Hybrid Transactional Memory System
May, 2011
Nehir Sonmez, Oriol Arcas, Otto Pflucker, Osman S. Unsal, Adrián Cristal, Ibrahim Hur, Satnam Singh and Mateo Valero , Proceedings of the 19th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM)
-
Why STM can be more than a Research Toy
April, 2011
Aleksandar Dragojevic, Pascal Felber, Vincent Gramoli, Rachid Guerraoui
Communications of the ACM (to appear)
Technical Report #LPD-REPORT-2009-003
|
|